Designer-driven topology optimization for pipelined analog to digital converters

Proceedings -Design, Automation and Test in Europe, DATE '05

Volumn I, Issue , 2005, Pages 279-281

  Chien, Yu Tsun ^a   Chen, Dong ^b   Lou, Jea Hong ^a   Ma, Gin Kou ^a   Rutenbar, Rob A ^b   Mukherjee, Tamal ^b  

^a INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

^b CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; MATHEMATICAL MODELS; OPTIMIZATION; PIPELINE PROCESSING SYSTEMS; TOPOLOGY;

ANALYTICAL MODELS; PIPELINED CONVERTERS; POWER MINIMIZATION; RESOLUTION DISTRIBUTION;

ANALOG TO DIGITAL CONVERSION;

EID: 33646933535     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2005.119     Document Type: Conference Paper

References (10)

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