Stochastic computing chip for measurement of Manhattan distance

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 45, Issue 4 B, 2006, Pages 3301-3306

  Hori, Michihiro ^a   Ueda, Michihito ^b   Iwata, Atsushi ^a  

^a HIROSHIMA UNIVERSITY   (Japan)

^b PANASONIC CORPORATION   (Japan)

Author keywords

Chaos and CMOS; Manhattan distance; Stochastic computing

Indexed keywords

CHAOS THEORY; CMOS INTEGRATED CIRCUITS; COMPUTATION THEORY; RANDOM PROCESSES; SUMMING CIRCUITS;

CHAOS AND CMOS; EXCLUSIVE OR (EXOR) CIRCUITS; MANHATTAN DISTANCE; STOCHASTIC COMPUTING;

MICROPROCESSOR CHIPS;

EID: 33646897902     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.1143/JJAP.45.3301     Document Type: Article

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