Memory-centric security architecture

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3793 LNCS, Issue , 2005, Pages 153-168

  Shi, Weidong ^a   Lu, Chenghuai ^a   Lee, Hsien Hsin S ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; COMPUTER SOFTWARE; DATA STORAGE EQUIPMENT; PROGRAM PROCESSORS; SECURITY OF DATA;

MEMORY CENTRIC DESIGN; MEMORY-CENTRIC SECURITY ARCHITECTURE; SECURITY MODELS; SOFTWARE COMPONENTS;

COMPUTER ARCHITECTURE;

EID: 33646823264     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11587514_11     Document Type: Conference Paper

References (13)

1. E. Cohen and D. Jefferson. Protection in the hydra operating system. In Proceedings of the 5th Symposium on Operating Systems Principles, 1975.
2. D. Lie, C. Thekkath, M. Mitchell, P. Lincoln, D. Boneh, J. Mitchell, and M. Horowitz. Architectual Support For Copy and Tamper Resistant Software. In Proceedings of the 9th Symposium on Architectural Support for Programming Languages and Operating Systems, 2000.
3. D. Lie, C. A. Thekkath, and M. Horowitz. Implementing an Untrusted Operating System on Trusted Hardware. In Proceedings of the Symposium on Operating Systems Principles, 2003.
4. R. M. Needham and R. D. Walker. The Cambridge CAP Computer and its Protection System. In Proceedings of the Symposium on Operating Systems Principles, 1977.
5. W. Shi, H.-H. S. Lee, M. Ghosh, C. Lu, and A. Boldyreva, High Efficiency Counter Mode Security Architecture via Prediction and Precomputation. In Proceedings of the International Symposium on Computer Architecture, 2005.
6. E. G. Suh, D. Clarke, B. Gassend, M. van Dijk, and S. Devadas. Efficient Memory Integrity Verification and Encryption for Secure Processors. In Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003.
7. E. G. Suh, D. Clarke, M. van Dijk, B. Gassend, and S. Devadas. AEGIS: Architecture for Tamper-Evident and Tamper-Resistant Processing. In Proceedings of the International Conference on Supercomputing, 2003.
8. N. Vachharajani, M. J. Bridges, J. Chang, R. Rangan, G. Ottoni, J. A. Blome, G. A. Reis, M. Vachharajani, and D. I. August. RIFLE: An Architectural Framework for User-Centric Information-Flow Security. In Proceedings of the International Symposium on Microarchitecture, 2004.
9. S. Vlaovic and E. S. Davidson. TAXI: Trace Analysis for X86 Interpretation. In Proceedings of the 2002 IEEE International Conference on Computer Design, 2002.
10. E. J. Witchel. Mondrian Memory Protection, PhD thesis, Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, 2004.
11. J. Yang, Y. Zhang, and L. Gao. Fast Secure Processor for Inhibiting Software Piracty and Tampering. In Proceedings of International Symposium on Microarchitecture, 2003.
12. X. Zhuang, T. Zhang, and S. Pande. HIDE: an Infrastructure for Efficiently Protecting Information Leakage on the Address Bus. In Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems, 2004.
13. X. Zhuang, T. Zhang, S. Pande, and H.-H. S. Lee. HIDE: Hardware-support for Leakage-Immune Dynamic Execution. Technical Report GIT-CERCS-03-21, Geogia Institute of Technology, 2003.