Removing sub-50nm particles during blank substrate cleaning

Solid State Technology

Volumn 49, Issue 4, 2006, Pages 47-49

  Rastegar, Abbas ^a   Eichenlaub, Sean ^a   Ikuta, Yoshiaki ^b   Popp, Helmut ^c   Goncher, Kurt ^d,f   Marmillion, Pat ^a,e  

^a SEMATECH   (United States)

^b ASAHI GLASS CO LTD   (Japan)

^c Schott Lithotec   (Germany)

^d Steag Hamatech   (United States)

^e IBM   (United States)

^f Steag Hamatech   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS (ITRS); MASK BLANK DEVELOPMENT CENTER (MBDC); SEMATECH (CO);

CLEANING; COATING TECHNIQUES; MULTILAYERS;

SEMICONDUCTOR MATERIALS;

EID: 33646738107     PISSN: 0038111X     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Review

References (8)

1. A. Rastegar et al., "Recent Advances in Cleaning EUV Substrates," International Symposium on Extreme Ultraviolet Lithography, San Diego, California November 2005.
2. A. Rastegar et al., "Progress in Mask Cleaning in SEMATECH," SEMATECH Mask Cleaning Workshop, Monterey CA, October 2005.
3. P. Kearney, et al. "Overcoming Substrate Defect Decoration Effects in EUVL Mask Blank Development," Proc. SPIE, Vol. 5567, p. 800-806, 24th Annual BACUS Symposium on Photomasks.
4. A. Rastegar, "Cleaning of Clean Quartz Plates," Surface Preparation and Wafer Cleaning Workshop, Austin, April 2005.
5. K.L. Johnson, K. Kendall, A.D. Roberts "Surface Energy and the Contact of Elastic Solids," Proc. R. Soc. V 324,p. 301, 1971.
6. G.M. Burdick, N.S. Berman, S.P. Beaudoin, Journal of Nanoparticle Research 3, p. 455-467, 2001.
7. K. Cooper, S. Eichenlaub, A. Gupta, S. Beaudoin, Journal of the Electrochemical Society, Vol. 149(4), 2002.
8. M.A. Hubbe, Colloids and Surfaces 12, p. 151-178, 1984.