Translating hardware process algebras into standard process algebras: Illustration with CHP and LOTOS

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3771 LNCS, Issue , 2005, Pages 287-306

  Salaün, Gwen ^a   Serwe, Wendelin ^a  

^a INRIA RHÔNE ALPES   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ALGEBRA; COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER AIDED LANGUAGE TRANSLATION; NETWORK PROTOCOLS; SEMANTICS; STANDARDS; SYNCHRONIZATION;

ASYNCHRONOUS HARDWARE DESIGNS; HANDSHAKE PROTOCOL; STRUCTURAL OPERATIONAL SEMANTICS; VERIFICATION TOOLBOX;

COMPUTER HARDWARE;

EID: 33646732641     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11589976_17     Document Type: Conference Paper

References (23)

1. E. Beigné, F. Clermidy, P. Vivet, A. Clouard, and M. Renaudin. An Asynchronous NOC Architecture Providing Low Latency Service and Its Multi-Level Design Framework. In ASYNC'05, pp. 54-63. IEEE Computer Society, Mar. 2005.
2. J. A. Bergstra, A. Ponse, and S. A. Smolka, editors. Handbook of Process Algebra. Elsevier, 2001.
3. T. Bolognasl and E. Brinksma. Introduction to the ISO Specification Language LOTOS. Computer Networks and ISDN Systems, 14(1):25-59, Jan. 1988.
4. D. Borrione, M. Boubekeur, L. Mounier, M. Renaudin, and A. Sirianni. Validation of Asynchronous Circuit Specifications using IF/CADP. In VLSI-SoC 2003, pp. 86-91, Dec. 2003.
5. F. S. de Boer and C. Palamidessi. A Fully Abstract Model for Concurrent Constraint Programming. In CAAP'91, LNCS 493, pp. 296-319. Springer, Apr. 1991.
6. D. Edwards and A. Bardsley. Balsa: An Asynchronous Hardware Synthesis Language. The Computer Journal, 45(1):12-18, 2002.
7. W. Fokkink. Introduction to Process Algebra. Texts in Theoretical Computer Science. Springer, 2000.
8. H. Garavel, F. Lang, and R. Mateescu. Compiler Construction using LOTOS NT. In CC 2002, LNCS 2304, pp. 9-13. Springer, Apr. 2002.
9. H. Garavel, F. Lang, and R. Mateescu. An Overview of CADP 2001. EASST Newsletter, 4:13-24, Aug. 2002.
10. H. Garavel and W. Serwe. State Space Reduction for Process Algebra Specifications. In AMAST'2004, LNCS 3116, pp. 164-180. Springer, July 2004.
11. H. Garavel and J. Sifakis. Compilation and Verification of LOTOS Specifications. In International Symposium on Protocol Specification, Testing and Verification, pages 379-394. IFIP, North-Holland, June 1990.
12. S. Hauck. Asynchronous Design Methodologies: An Overview. Proceedings of the IEEE, 83(1):69-93, Jan. 1995.
13. ISO/IEC. LOTOS - A Formal Description Technique Based on the Temporal Ordering of Observational Behaviour. International Standard 8807, Geneva, 1989.
14. J. L. W. Kessels and A. M. G. Peeters. The Tangram Framework (Embedded Tutorial): Asynchronous Circuits for Low Power. In ASP-DAG 2001, pp. 255-260. ACM, 2001.
15. F. Lang. Compositional Verification using SVL Scripts. In TACAS'2002, LNCS 2280, pp. 465-469. Springer, Apr. 2002.
16. A. J. Martin. The Probe: An Addition to Communication Primitives. Information Processing Letters, 20(3):125-130, Apr. 1985.
17. A. J. Martin. Compiling Communicating Processes into Delay-Insensitive VLSI Circuits. Distributed Computing, 1(4):226-234, 1986.
18. Data Encryption Standard (DES). Federal Information Processing Standards FIPS PUB 46-3, National Institute of Standards and Technology, Oct. 25 1999.
19. M. Renaudin. TAST Compiler and TAST.CHP Language, Version 0.6. TIMA Laboratory, CIS Group, 2005.
20. M. Renaudin and A. Yakovlev. From Hardware Processes to Asynchronous Circuits via Petri Nets: an Application to Arbiter Design. In TOBACO'04, June 2004.
21. W. Serwe. On Concurrent Functional-Logic Programming. Thèse de doctorat, Institut National Polytechnique de Grenoble, Mar. 2002.
22. K. van Berkel. Handshake Circuits: An Asynchronous Architecture for VLSI Programming. Cambridge University Press, 1993.
23. X. Wang, M. Kwiatkowska, G. Theodoropoulos, and Q. Zhang. Towards a Unifying CSP approach for Hierarchical Verification of Asynchronous Hardware. In AVoCS'04, ENTCS 128, pp. 231-246, 2004.