Finding and fixing faults

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3725 LNCS, Issue , 2005, Pages 35-49

  Staber, Stefan ^a   Jobstmann, Barbara ^a   Bloem, Roderick ^a  

^a GRAZ UNIVERSITY OF TECHNOLOGY   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

SEQUENTIAL SYSTEMS; SYMBOLIC IMPLEMENTATION; TEMPORAL LOGIC;

ALGORITHMS; COMPUTER SCIENCE; DATA PROCESSING; FORMAL LOGIC; MATHEMATICAL MODELS; PROBLEM SOLVING;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 33646417313     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11560548_6     Document Type: Conference Paper

References (25)

1. +96] R. K. Brayton et al. VIS: A system for verification and synthesis. In T. Henzinger and R. Alur, editors, Eighth Conference on Computer Aided Verification (CAV'96), pages 428-432. Springer-Verlag, Rutgers University, 1996. LNCS 1102.
2. [BNR03] T. Ball, M. Naik, and S. K. Rajamani. From symptom to cause: Localizing errors in counterexample traces. In 30th Symposium on Principles of Programming Languages (POPL 2003), pages 97-105, January 2003.
3. [CFTD93] L. Console, G. Friedrich, and D. Theseider Dupré. Model-based diagnosis meets error diagnosis in logic programs. In Proceedings of the International Joint Conference on Artificial Intelligence (IJCAI'93), pages 1494-1499. Morgan-Kaufmann, 1993.
4. [CGP99] E. M. Clarke, O. Grumberg, and D. A. Peled. Model Checking. MIT Press, Cambridge, MA, 1999.
5. [CT91] L. Console and P. Torasso. A spectrum of logical definitions of model-based diagnosis. Computational Intelligence, 7(3):133-141, 1991.
6. [CWH94] P.-Y. Chung, Y.-M. Wang, and I. N. Hajj. Logic design error diagnosis and correction. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2:320-332, 1994.
7. +04] M. Fahim Ali, A. Veneris, S. Safarpur, R. Drechsler, A. Smith, and M. Abadir. Debugging sequential circuits using boolean satisfiability. In International Conference on Computer Aided Design, pages 204-209, 2004.
8. [Gro04] A. Groce. Error explanation with distance metrics. In International Conference on Tools and Algorithms for Construction and Analysis of Systems (TACAS'04), pages 108-122, Barcelona, Spain, March-April 2004. LNCS 2988.
9. [GV03] A. Groce and W. Visser. What went wrong: Explaining counterexamples. In Model Checking of Software: 10th International SPIN Workshop, pages 121-135. Springer-Verlag, May 2003. LNCS 2648.
10. [HD84] W. Hamscher and R. Davis. Diagnosing circuits with state: An inherently underconstrained problem. In Proceedings of the Fourth National Conference on Artificial Intelligence (AAAI'84), pages 142-147, Austin, TX, 1984.
11. [JGB05] B. Jobstmann, A. Griesmayer, and R. Bloem. Program repair as a game. To appear at Computer Aided Verification, 2005.
12. [JRS02] H. Jin, K. Ravi, and F. Somenzi. Fate and free will in error traces. In International Conference on Tools and Algorithms for Construction and Analysis of Systems (TACAS'02), pages 445-459, Grenoble, France, April 2002. LNCS 2280.
13. [KW87] J. de Kleer and B. C. Williams. Diagnosing multiple faults. Artificial Intelligence, 32:97-130, 1987.
14. [LTH90] H.-T. Liaw, J.-H. Tsiah, and I. N. Hajj. Efficient automatic diagnosis of digital circuits. In Proceedings of the IEEE International Conference on Computer Aided Design, pages 464-467, 1990.
15. [MCB89] J. C. Madre, O. Coudert, and J. P. Billon. Automating the diagmosis and the rectification of design error with PRIAM. In Proceedings of the IEEE International Conference on Computer Aided Design, pages 30-33, 1989.
16. [PGA87] D. L. Poole, R. Goebel, and R. Aleliunas. Theorist: a logical reasoning system for defaults and diagnosis. In N. Gereone and G. McCalla, editors, The Knowledge Frontier: Essays in the Representation of Knowledge, pages 331-352. Springer Verlag, 1987.
17. [Rei87] R. Reiter. A theory of diagnosis from first principles. Artificial Intelligence, 32:57-95, 1987.
18. [RR03] M. Renieris and S. P. Reiss. Fault localization with nearest neighbor queries. In International Conference on Automated Software Engineering, pages 30-39, Montreal, Canada, October 2003.
19. [RS04] K. Ravi and F. Somenzi. Minimal assignments for bounded model checking. In International Conference on Tools and Algorithms for Construction and Analysis of Systems (TACAS'04), pages 31-45, Barcelona, Spain, March-April 2004. LNCS 2988.
20. [SW99] M. Stumptner and F. Wotawa. Debugging functional programs. In Proceedings on the 16th International Joint Conference on Artificial Intelligence, 1999.
21. [TYSH94] M. Tomita, T. Yamamoto, F. Sumikawa, and K. Hirano. Rectification of multiple logic design errors in multiple output circuits. In Proceedings of the Design Automation Conference, pages 212-217, 1994.
22. [VW94] M. Vardi and P. Wolper. Reasoning about infinite computations. Information and Computation, 115:1-37, 1994.
23. [WB95] A. Wahba and D. Borrione. Design error diagnosis in sequential circuits. In Correct Hardware Design and Verification Methods (CHARME'95), pages 171-188, 1995. LNCS 987.
24. [Zel02] A. Zeller. Isolating cause-effect chains from computer programs. In 10th International Symposium on the Foundations of Software Engineering (FSE-10), pages 1-10, November 2002.
25. [ZH02] A. Zeller and R. Hildebrandt. Simplifying and isolating failure-inducing input. IEEE Transactions on Software Engineering, 28(2): 183-200, February 2002.