A direct digital frequency synthesizer with single-stage delta-sigma interpolator and current-steering DAC

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn 2005, Issue , 2005, Pages 56-59

  Ni, Weining ^a   Dai, Foster F ^b   Shi, Yin ^a   Jaeger, Richard C ^b  

^a INSTITUTE OF SEMICONDUCTORS   (China)

^b AUBURN UNIVERSITY   (United States)

Author keywords

CMOS; DAC; DDFS; Delta sigma interpolator; Q2 Random Walk

Indexed keywords

CMOS INTEGRATED CIRCUITS; DELTA SIGMA MODULATION; DIGITAL TO ANALOG CONVERSION; INTERPOLATION; ROM;

DELTA SIGMA INTERPOLATORS; DIRECT DIGITAL FREQUENCY SYNTHESIZER (DDFS); Q2 RANDOM WALK; SPURIOUS FREE DYNAMIC RANGE (SFDR);

FREQUENCY SYNTHESIZERS;

EID: 33645664114     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2005.1469333     Document Type: Conference Paper

References (7)

1. B. Goldberg, Digital techniques in frequency synthesis, McGraw Hill, 1996, New York
2. Yongchul Song, and Beomsup Kim, "A 14-b Direct Digital Frequency Synthesizer With Sigma-Delta Noise Shaping", IEEE Journal of Solid-State Circuits , vol 39, pp 847-851 No. 5, May 2004
3. P. O'Leary and F. Maloberti, "A Direct-Digital Synthesizer with Improved Spectral Performance," IEEE Trans. On Communications, vol. 39, pp. 1046-1048, July 1991.
4. J. Rogers, M. Cavin, F. Dai, and D. Rahn, "A delta-sigma Fractional-N Frequency Synthesizer with Multi-Band PMOS VCOs for 2.4 and 5GHz WLAN Applications", European Solid-State Circuits Conference (ESSCIRC), Estoril, Portugal, September, 2003
5. T. Jackson, G. Eapen and F. Dai, "Feed Forward Sigma Delta Interpolator For Use in a Fractional-N Synthesizer", US Patent Application Publication, No. 0067773 A1, June. 6, 2002
6. W. Rhee et al., "A 1.1-GHz CMOS fractional-N frequency synthesizer with a 3-b third-order delta-sigma modulator," IEEE J. Solid-State Circuits, vol. 35, pp. 1453-1460, Oct. 2000.
7. 2 random walk CMOS DAC. IEEE J Solid-State Circuits, 1999, 34(12): 1708