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Volumn 53, Issue 3, 2006, Pages 212-216

Analysis and Design of a Low-Voltage RF CMOS Mixer

Author keywords

CMOS analog integrated circuits; low voltage circuit; mixers; noise and linearity analysis

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; OSCILLATORS (ELECTRONIC); SPURIOUS SIGNAL NOISE;

EID: 33644998386     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2005.857762     Document Type: Article
Times cited : (26)

References (12)
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    • Wang, H.1
  • 3
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    • A 2.4-GHz CMOS down-conversion doubly balanced mixer with low supply voltage
    • C.-C. Tang, W.-S. Lu, L.-D. Van, and W.-S. Feng, “A 2.4-GHz CMOS down-conversion doubly balanced mixer with low supply voltage,” in Proc. Int. Symp. Circuits Syst., vol. 4, 2001, pp. 794–797.
    • (2001) Proc. Int. Symp. Circuits Syst. , vol.4 , pp. 794-797
    • Tang, C.-C.1    Lu, W.-S.2    Van, L.-D.3    Feng, W.-S.4
  • 4
    • 20344389794 scopus 로고    scopus 로고
    • A new low-voltage RF CMOS mixer design
    • May
    • L. Liu and Z. H. Wang, “A new low-voltage RF CMOS mixer design,” Chin. J. Semiconduct., vol. 26, no. 5, May 2005.
    • (2005) Chin. J. Semiconduct. , vol.26 , Issue.5
    • Liu, L.1    Wang, Z.H.2
  • 5
    • 33644993367 scopus 로고    scopus 로고
    • Analysis and design of current-commutating CMOS mixers
    • Ph.D. dissertation, Univ. of California at Berkeley
    • E. Terrovitis, “Analysis and design of current-commutating CMOS mixers,” Ph.D. dissertation, Univ. of California at Berkeley, 2001.
    • (2001)
    • Terrovitis, E.1
  • 7
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    • CMOS RF mixer no-linearity design
    • Aug.
    • Q. Li, “CMOS RF mixer no-linearity design,” in Proc. 44th Midwest Symp. Circuits Syst., vol. 2, Aug. 2001, pp. 14–17.
    • (2001) Proc. 44th Midwest Symp. Circuits Syst. , vol.2 , pp. 14-17
    • Li, Q.1
  • 8
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    • Calculation of intermodulation distortion in CMOS transconductance stage
    • L. Liu, Z. H. Wang, and G. L. Li, “Calculation of intermodulation distortion in CMOS transconductance stage,” in Proc. Int. Symp. Circuits Syst., 2005, pp. 3700–3703.
    • (2005) Proc. Int. Symp. Circuits Syst. , pp. 3700-3703
    • Liu, L.1    Wang, Z.H.2    Li, G.L.3
  • 10
    • 0034499917 scopus 로고    scopus 로고
    • Gate layout and bonding pad structure of a RF n-MOSFET for low noise performance
    • Dec.
    • C. S. Kim, J.-W. Park, H. K. Yu, and H. Cho, “Gate layout and bonding pad structure of a RF n-MOSFET for low noise performance,” IEEE Electron Dev. Lett., vol. 21, no. 12, pp. 607–609, Dec. 2000.
    • (2000) IEEE Electron Dev. Lett. , vol.21 , Issue.12 , pp. 607-609
    • Kim, C.S.1    Park, J.-W.2    Yu, H.K.3    Cho, H.4
  • 12
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    • CMOS implementation of WLAN transceiver RF front-end
    • Ph.D. dissertation, Tsinghua University, Beijing, China
    • B. Y. Chi, “CMOS implementation of WLAN transceiver RF front-end,” Ph.D. dissertation, Tsinghua University, Beijing, China, 2003.
    • (2003)
    • Chi, B.Y.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.