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Volumn 2, Issue , 2002, Pages 417-420
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Designing low electro magnetic emissions circuits through clock skew optimization
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Author keywords
[No Author keywords available]
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Indexed keywords
CLOCK FREQUENCY;
CLOCK SKEW OPTIMIZATION;
CLOCK TREE;
COMBINATIONAL BLOCKS;
CONDUCTED EMISSIONS;
ELECTROMAGNETIC EMISSIONS;
LOGIC SYNTHESIS;
NEW TECHNOLOGIES;
OPERATING FREQUENCY;
POWER SUPPLY;
POWER SUPPLY CURRENT;
SINGLE CHIPS;
TIMING CONSTRAINTS;
DIGITAL INTEGRATED CIRCUITS;
LAWS AND LEGISLATION;
TIMING CIRCUITS;
CLOCKS;
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EID: 33644564867
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ICECS.2002.1046183 Document Type: Conference Paper |
Times cited : (4)
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References (7)
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