Microarchitectural synthesis of ICs with embedded concurrent fault isolation

Digest of Papers - 27th Annual International Symposium on Fault-Tolerant Computing, FTCS 1997

Volumn , Issue , 1997, Pages 329-338

  Hamilton, Samuel Norman ^a   Orailoǧlu, Alex ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ERROR CORRECTION; FAULT TOLERANCE; HIGH LEVEL SYNTHESIS; TIMING CIRCUITS;

ALGORITHMIC APPLICATIONS; CHIP-LEVEL; CORRECTION EQUATION; DOMAIN SPECIFIC; FAULT IDENTIFICATIONS; FAULT ISOLATION; FUNCTIONAL UNITS; PERMANENT FAULTS;

INTEGRATED CIRCUITS;

EID: 33644485802     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FTCS.1997.614107     Document Type: Conference Paper

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