Effect of solder composition and substrate surface finish on board level drop test reliability

Proceedings of the ASME/Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems: Advances in Electronic Packaging 2005

Volumn PART B, Issue , 2005, Pages 1109-1113

  Jiang, Don Son ^a   Hung, Joe ^a   Wang, Yu Po ^a   Hsiao, C S ^a  

^a SILICONWARE PRECISION INDUSTRIES CO LTD   (Taiwan)

Author keywords

Board level drop test; Lead free solder and surface finish

Indexed keywords

BONDING; COMPOSITION; CRACKS; RELIABILITY; SOLDERED JOINTS; STRAIN RATE; TIN COMPOUNDS;

BOARD LEVEL DROP TEST; INTERFACIAL BONDING; LEAD FREE SOLDER AND SURFACE FINISH;

SOLDERING ALLOYS;

EID: 32844474791     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1115/ipack2005-73063     Document Type: Conference Paper

References (9)

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