Low temperature and channel engineering influence on harmonic distortion of SOI nMOSFETs for analog applications

Proceedings - Electrochemical Society

Volumn PV 2005-03, Issue , 2005, Pages 125-130

  Pavanello, M A ^a,b   Cerdeira, A ^c   Aleman M A ^c   Martino, J A ^a,b   Vancaillie, L ^d   Flandre, D ^d  

^a CENTRO UNIVERSITÁRIO DA FEI   (Brazil)

^b UNIVERSITY OF SÃO PAULO   (Brazil)

^c DEPARTAMENTO DE FÍSICA   (Mexico)

^d UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

DRAIN CURRENT RATIO; LATERAL CHANNEL ENGINEERING;

DOPING (ADDITIVES); ELECTRIC CURRENTS; HARMONIC DISTORTION; LOW TEMPERATURE EFFECTS; SILICON ON INSULATOR TECHNOLOGY; TRANSCONDUCTANCE; TRANSISTORS;

MOSFET DEVICES;

EID: 31844456723     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

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