Stability enhancement of polysilicon thin-film transistors using stacked plasma-enhanced chemical vapor deposited SiO2/SiNx gate dielectric

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 44, Issue 9 A, 2005, Pages 6417-6420

  Choi, Byoung Deog ^a   Kim, Won Sik ^a   So, Myeong Seob ^a   Koo, Jae Bon ^a   Kakkad, Ramesh ^a   Mo, Yeon Gon ^a   Kim, Sung Chul ^a  

^a Samsung Advanced Institute of Technology (SAIT)   (South Korea)

Author keywords

Contamination; Gate oxide integrity; Mobile charge; Polycrystalline silicon thin film transistor (poly Si TFT); Silicon dioxide; Silicon nitride

Indexed keywords

DIELECTRIC MATERIALS; ELECTRIC INSULATORS; ELECTRODES; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; SILICA; THIN FILM TRANSISTORS;

GATE OXIDE INTEGRITY; POLYCRYSTALLINE SILICON THIN-FILM TRANSISTORS (POLY-SI TFT);

POLYSILICON;

EID: 31544470619     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.1143/JJAP.44.6417     Document Type: Article

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