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Volumn , Issue , 2004, Pages 261-266

An on-chip transfer function characterization system for analog built-in testing

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN TESTING (BIT); CONTINOUS TIME (CT); DESIGN OF TESTABILITY (DFT);

EID: 3142752884     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTEST.2004.1299252     Document Type: Conference Paper
Times cited : (9)

References (11)
  • 1
    • 0032183635 scopus 로고    scopus 로고
    • A tutorial introduction to research on analog and mixed-signal circuit testing
    • October
    • L. S. Milor, "A Tutorial Introduction to Research on Analog and Mixed-Signal Circuit Testing", IEEE TCAS-II, vol. 45, no. 10, pp. 1389-1047, October 1998.
    • (1998) IEEE TCAS-II , vol.45 , Issue.10 , pp. 1389-1047
    • Milor, L.S.1
  • 3
    • 0036290961 scopus 로고    scopus 로고
    • Application of group delay equalization in testing fully-balanced Ota-c Filters
    • R. Wilcock, B.M and Al-Hashimi, "Application of group delay equalization in testing fully-balanced OTA-C Filters", IEEE ISCAS, Vol. 4, pp. 643-646, 2002.
    • (2002) IEEE ISCAS , vol.4 , pp. 643-646
    • Wilcock, R.1    M, B.2    Al-Hashimi3
  • 4
    • 0034297664 scopus 로고    scopus 로고
    • Testable design of multiple-stage OTA-C filters
    • October
    • C. Hsu and W. Feng, "Testable design of multiple-stage OTA-C filters", IEEE TIM, vol. 49, no. 5, pp. 929-934, October. 2000.
    • (2000) IEEE TIM , vol.49 , Issue.5 , pp. 929-934
    • Hsu, C.1    Feng, W.2
  • 5
    • 0032627502 scopus 로고    scopus 로고
    • A current-mode testable design of operational transconductance amplifier-capacitor filters
    • April
    • K. J. Lee, W. C. Chiang and K. S. Huang, "A Current-Mode Testable Design of Operational Transconductance Amplifier-Capacitor Filters", IEEE TCAS-II, vol. 46, no. 4, pp. 401-413, April 1999.
    • (1999) IEEE TCAS-II , vol.46 , Issue.4 , pp. 401-413
    • Lee, K.J.1    Chiang, W.C.2    Huang, K.S.3
  • 6
    • 0002621116 scopus 로고
    • An integrated approach for analog circuit testing with a minimum number of detected parameters
    • M. Slamani, B. Kaminska, and G. Quesnel, "An integrated approach for analog circuit testing with a minimum number of detected parameters", IEEE International Test Conference, pp. 631-640, 1994.
    • (1994) IEEE International Test Conference , pp. 631-640
    • Slamani, M.1    Kaminska, B.2    Quesnel, G.3
  • 7
    • 0032260167 scopus 로고    scopus 로고
    • CMOS transconductance multipliers: A tutorial
    • December
    • G. Han and E. Sánchez-Sinencio, "CMOS Transconductance Multipliers: A Tutorial", IEEE TCAS-II, vol. 45, no. 12, pp. 1550-1563, December 1998.
    • (1998) IEEE TCAS-II , vol.45 , Issue.12 , pp. 1550-1563
    • Han, G.1    Sánchez-Sinencio, E.2
  • 9
    • 0345314097 scopus 로고    scopus 로고
    • A fully balanced pseudo-differential OTA with common-mode feedforward and inherent common-mode feedback detector
    • April
    • A.N. Mohieldin, E. Sánchez-Sinencio and J. Silva-Martinez, "A fully balanced pseudo-differential OTA with common-mode feedforward and inherent common-mode feedback detector", IEEE JSSC, Vol. 38 Issue 4, pp. 663-668, April 2003.
    • (2003) IEEE JSSC , vol.38 , Issue.4 , pp. 663-668
    • Mohieldin, A.N.1    Sánchez-Sinencio, E.2    Silva-Martinez, J.3
  • 11
    • 84862384668 scopus 로고    scopus 로고
    • Data sheet available from: http://focus.ti.com/lit/ds/symlink/ths7001.pdf


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.