More than just a package - Wafer-level packaging of MEMS

European Semiconductor

Volumn 26, Issue 6, 2004, Pages 27-29

  Baert, K ^a   De Moor, P ^a   Tilmans, H ^a   John, J ^a   Witvrouw, A ^a   Van Hoof, C ^a   Beyne, E ^a  

^a IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP STACKING; INDENT REFLOW SEALING (IRS); SUBSYSTEM INTEGRATION; THERMAL POWER;

ACTUATORS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CONCURRENT ENGINEERING; COSTS; ENCAPSULATION; FLIP CHIP DEVICES; HERMETIC SEALS; MICROELECTROMECHANICAL DEVICES; MICROMACHINING; RESONATORS; SENSORS; THIN FILM CIRCUITS;

ELECTRONICS PACKAGING;

EID: 3042705825     PISSN: 02656027     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Review

References (1)

1. E Parton, and H Tilmans, Wafer-level MEMS packaging, Advanced Packaging, Vol. 11, No.4, pp.21-23, 2002.