Architectural design features of a programmable high throughput AES coprocessor

International Conference on Information Technology: Coding Computing, ITCC

Volumn 2, Issue , 2004, Pages 498-502

  Hodjat, Alireza ^a   Schaumont, Patrick ^a   Verbauwhede, Ingrid ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COPROCESSORS; COUNTER MODE; PROGRAMMING INTERFACES; SECURITY ENGINES;

ALGORITHMS; ARCHITECTURAL DESIGN; CMOS INTEGRATED CIRCUITS; CRYPTOGRAPHY; INTERFACES (COMPUTER); OPTIMIZATION; SECURITY OF DATA;

PROGRAM PROCESSORS;

EID: 3042642126     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ITCC.2004.1286703     Document Type: Conference Paper

References (13)

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