Instruction selection, resource allocation, and scheduling in the AVIV retargetable code generator

Proceedings - Design Automation Conference

Volumn , Issue , 1998, Pages 510-515

  Hanono, Silvina ^a   Devadas, Srinivas ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; HEURISTIC ALGORITHMS; OPTIMIZATION; RESOURCE ALLOCATION; SCHEDULING; ALGORITHMS; EMBEDDED SYSTEMS; GRAPH THEORY; HEURISTIC METHODS; PROGRAM COMPILERS; REDUCED INSTRUCTION SET COMPUTING;

APPLICATION CODES; CODE GENERATORS; FUNCTIONAL UNIT ASSIGNMENT; INPUT APPLICATIONS; INSTRUCTION SELECTION; INSTRUCTION SET ARCHITECTURE; REGISTER ALLOCATION; REGISTER REQUIREMENT;

OPTIMAL SYSTEMS; CODE CONVERTERS;

DIRECTED ACYCLIC GRAPHS (DAG); RETARGETABLE CODE GENERATORS;

EID: 0031623719     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/277044.277184     Document Type: Conference Paper

References (11)

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