Loading the bases: A new number representation with applications

IEEE Circuits and Systems Magazine

Volumn 3, Issue 2, 2003, Pages 6-23

  Dimitrov, Vassil S ^a   Jullien, Graham A ^a  

^a UNIVERSITY OF CALGARY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ANGLE MEASUREMENT; COMPUTATIONAL COMPLEXITY; CRYPTOGRAPHY; DIGITAL FILTERS; INTEGER PROGRAMMING; LINEAR SYSTEMS; MULTIPLEXING; NUMBER THEORY; OPTIMIZATION; PROBLEM SOLVING; SET THEORY; SPURIOUS SIGNAL NOISE; TABLE LOOKUP; VLSI CIRCUITS;

COMPUTER ARITHMATICS; DOUBLE-BASE NUMBER SYSTEM (DBNS); LOGARITHMIC SYSTEMS; NUMBER REPRESENTATION;

LOGIC CIRCUITS;

EID: 2942653092     PISSN: 1531636X     EISSN: None     Source Type: Journal    
DOI: 10.1109/MCAS.2003.1242832     Document Type: Article

References (32)

1. A. D. Booth, "A Signed Binary Multiplication Technique", Quart. J. Mech. Appl. Math., vol. 4, Part 2, pp. 236-240, 1951.
2. A. A. Avlzlenls, A Study of Redundant Number Representations for Parallel Digital Computers, Ph.D. Thesis, University of Illinois, 1960.
3. M. D. Ercegovac and T. Lang, Digital Arithmetic, Morgan Kaufmann, 2003.
4. V. S. Dimltrov, G. A. Jullien and W. C. Miller, "Theory and Applications of the Double-Base Number System", IEEE Trans. on Computers, vol. 48, no. 10, pp. 1098-1106, October 1999.
5. S. Sadeghi-Emamchale, G. A. Jullien, V. S. Dimltrov and W. C. Miller, "Digital Arithmetic Using Cellular Neural Networks", Journal of Circuits, Systems and Computers, vol. 6, no. 8, pp. 515-535, December 1998.
6. V. S. Dimitrov, G. A. Jullten and W. C. Miller, "An Algorithm for Modular Exponentiation", Information Processing Letters, vol. 36, no. 5, pp. 155-159, May 1998.
7. B. M. M. deWeger, "Algorithms for Diophantine Equations", CWI Tracts, Amsterdam, vol. 65, 1989.
8. V. S. Dimltrov, S. Sadeghi-Emamchaie, G. A. Jullien and W. C. Miller, "A Near Canonic Double-Base Number System with Applications in DSP", SPIE Conference on Signal Processing Algorithms, vol. 2846, pp. 14-25, 1996.
9. T. ElGamal, "A Public Key Cryptosystem and a Signature Scheme Based on Discrete Logarithms", IEEE Trans. on Information Theory, IT-31, no. 4, pp. 469-472, 1985.
10. C. P. Shnorr, "Efficient Signature Generation by Smart Cards", Journal of Cryptology, vol. 4, no. 3, pp. 161-174, 1991.
11. E. F. Brickell and K. S. McCurley, "An Interactive Identification Scheme Based on Discrete Logarithms and Factoring", Journal of Cryptology, vol. 5, no. 1, pp. 29-39, 1992.
12. E. F. Brickell, D. M. Gordon, K. S. McCurley and D. B. Wilson, "Fast Exponentiation with Precomputation", Advances in Cryptology-Proceedings of Eurocrypt'92 (R. A. Rueppel, ed.), Lecture Notes in Computer Science, vol. 658, Springer-Verlag, pp. 200-207, 1993.
13. P. de Rooij, "Efficient Exponentiation Using Precomputations and Vector Addition Chains", Proceedings Eurocrypt'94, pp. 403-415.
14. J. von zur Gathen, "Processor-Efficient Exponentiation In Finite Fields", Information Processing Letters, vol. 41, pp. 81-86, 1992.
15. V. S. Dimitrov, J. Eskritt, L. Imbert, G. A. Jullien and W. C. Miller, "The Use of the Multi-Dimensional Logarithmic Number System In DSP Applications", Proceedings of the 15th IEEE Symposium on Computer Arithmetic, pp. 247-254, June, 2001.
16. R. Muscedere, G. A. Jullien, V. S. Dimitrov and W. C. Miller, "On Efficient Techniques for Difficult Operations In One and Two-Digit DBNS Index Calculus", Proc. 34th Asilomar Conf. on Sig., Syst. and Comp., pp. 870-874, 2000.
17. E. E. Swartzlander and A. G. Alexopoulos, "The Sign/Logarithm Number System", IEEE Trans. Computers, vol. 42, pp. 1238-1242, 1975.
18. F. J. Taylor, R. Gill, J. Joseph and J. Radke, "A 20 Bit Logarithmic Number System Processor", IEEE Trans. Computers, vol. 37, pp. 190-200, 1988.
19. N. G. Kingsbury and P. J. W. Rayner, "Digital Filtering Using Logarithmic Arithmetic", Electronics Letters, vol 7, pp. 56-58, 1971.
20. M. G. Arnold, T. A. Bailey, J. R. Cowles and J. J. Cupal, "Redundant Logarithmic Arithmetic", IEEE Trans Computers, vol. 39, no. 8, pp. 1077-1086, 1990.
21. J.-M. Muller, A. Scherbyna and A. Tisserand, "Semi-Logarithmic Number Systems", IEEE Trans. Computers, vol. 47, no. 2, pp. 145-151, 1998.
22. D. M. Lewis, "114 MFLOPS Logarithmic Number System Arithmetic Unit for DSP Applications", IEEE J. Solid-State Circuits, vol. 30, pp. 1547-1553, 1995.
23. D. M. Lewis, "Interleaved Memory Function Interpolators with Application to an Accurate LNS Arithmetic Unit", IEEE Trans. Computers, vol. 43, no. 8, pp. 974-982, 1994.
24. J. N. Coleman, E. I. Chester, C. I. Softley and J. Kaldec, "Arithmetic on the European Logarithmic Microprocessor", IEEE Trans. Computers, vol. 49, no. 7, pp. 702-715, 2000.
25. J. N. Coleman, C. I. Softley, J. Kadlec, R. Matousek, M. Licko, Z. Pohl, and A. Hermanek, "The European Logarithmic Microprocessor - a QR RLS Application", Proc. 34th Asilomar Conf. Signals, Systems and Computers, pp. 155-159, 2001.
26. R. Muscedere, G. A. Jullien, V. Dimitrov, W. C. Miller, "Non-Linear Signal Processing Using Index Calculus DBNS Arithmetic", Proc. of the 2000 SPIE conf. on Advanced Algorithms and Architectures in Signal Processing, vol. 4116, pp. 247-257, 2000.
27. R. Muscedere, G. A. Jullien, V. S. Dimitrov and W. C. Miller, "On Efficient Techniques for Difficult Operations in One and Two Digit DBNS Index Calculus", Proc, 34th Asilomar Conf. on Signals, Systems and Computers, pp. 870-874, November 2000.
28. S. Y. Kung, VLSI Array Processors. Prentice-Hall: ISBN 0-13-942749-X, 1988.
29. G. A. Jullien, V. S. Dimitrov, B. LI, W. C. Miller, A. Lee, and M. Ahmadi, "A Hybrid DBNS Processor for DSP Computation", Proc. 1999 Int. IEEE Symp. Circuits and Systems, vol. I, pp. 5-8.
30. J. Eskritt, R. Muscedere, G. A. Jullien, V. S. Dimitrov and W. C. Miller, "A 2-Digit DBNS Filter Architecture", IEEE Workshop on Signal Processing, Louisiana, pp. 447-456, October 2000.
31. H. Li, G. A. Jullien, V. S. Dimitrov, M. Ahmadi, and W. C. Miller, "A 2-Digit Multidimensional Logarithmic Number System Filterbank for a Digital Hearing Aid Architecture", Proc. 2002 Int. Symp. on Circuits and Systems, vol. 2, pp. 760-763, 2002.
32. R. Muscedere, V. S. Dimitrov, G. A. Jullien, and W. C. Miller, "Efficient Conversion From Binary to Multi-Digit Multi-Dimensional Logarithmic Number Systems Using Arrays of Range Addressable Look-Up Tables", IEEE 13th International Conference on Application-Specific Systems, Architectures and Processors, pp. 130-138, July 17-19, 2002.