The European logarithmic microprocessor - A QR RLS application

Conference Record of the Asilomar Conference on Signals, Systems and Computers

Volumn 1, Issue , 2001, Pages 155-159

  Coleman, J N ^a   Softley, C I ^a   Kadlec, J ^b   Matousek, R ^b   Licko, M ^b   Pohl, Z ^b   Hermanek, A ^b  

^a NEWCASTLE UNIVERSITY   (United Kingdom)

^b INSTITUTE OF INFORMATION THEORY AND AUTOMATION   (Czech Republic)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING; LEAST SQUARES APPROXIMATIONS; LOGARITHMIC AMPLIFIERS; RECURSIVE FUNCTIONS;

EUROPEAN LOGARITHMIC MICROPROCESSOR; RECURSIVE LEAST SQUARES TRACKING;

MICROPROCESSOR CHIPS;

EID: 0035573805     PISSN: 10586393     EISSN: None     Source Type: Journal    
DOI: 10.1109/ACSSC.2001.986897     Document Type: Article

References (5)

1. Arithmetic on the European logarithmic microprocessor
2. A 32-bit logarithmic arithmetic unit and its performance compared to floating-point
3. Extended precision logarithmic arithmetic
4. Low-power properties of the logarithmic number system