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Volumn , Issue , 2005, Pages 233-235

APlace: A general analytic placement framework

Author keywords

Analytical Placement; Congestion; Mixed Size; Multi Level

Indexed keywords

CONSTRAINT THEORY; TIMING CIRCUITS;

EID: 29144488370     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (51)

References (7)
  • 1
    • 0028424454 scopus 로고
    • Efficient local search with search space smoothing: A case study of the traveling salesman problem (TSP)
    • J. Gu and X. Huang, "Efficient Local Search with Search Space Smoothing: A Case Study of the Traveling Salesman Problem (TSP)", IEEE Trans. Systems, Man and Cybernetics 24(5) (1994), pp. 728-735.
    • (1994) IEEE Trans. Systems, Man and Cybernetics , vol.24 , Issue.5 , pp. 728-735
    • Gu, J.1    Huang, X.2
  • 2
    • 29144462822 scopus 로고    scopus 로고
    • "Method and System for High Speed Detailed Placement of Cells within an Integrated Circuit Design", US Patent 6370673, April
    • D. Hill, "Method and System for High Speed Detailed Placement of Cells within an Integrated Circuit Design", US Patent 6370673, April 2002.
    • (2002)
    • Hill, D.1
  • 3
    • 2942682815 scopus 로고    scopus 로고
    • Implementation and extensibility of an analytic placer
    • A. B. Kahng and Q. Wang, "Implementation and Extensibility of an Analytic Placer", Proc. Int. Symp. Physical Design, 2004, pp. 18-25.
    • (2004) Proc. Int. Symp. Physical Design , pp. 18-25
    • Kahng, A.B.1    Wang, Q.2
  • 4
    • 16244391451 scopus 로고    scopus 로고
    • An analytic placer for mixed-size placement and timing-driven placement
    • A. B. Kahng and Q. Wang, "An Analytic Placer for Mixed-Size Placement and Timing-Driven Placement", Proc. Int. Conf. Computer Aided Design, 2004, 565-572.
    • (2004) Proc. Int. Conf. Computer Aided Design , pp. 565-572
    • Kahng, A.B.1    Wang, Q.2
  • 7
    • 29144443147 scopus 로고    scopus 로고
    • "Non-Linear Optimization System and Method for Wire Length and Delay Optimization for an Automatic Electric Circuit Placer", US Patent 6301693, Oct.
    • W. Naylor et al., "Non-Linear Optimization System and Method for Wire Length and Delay Optimization for an Automatic Electric Circuit Placer", US Patent 6301693, Oct. 2001.
    • (2001)
    • Naylor, W.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.