A 4.8GHz fully pipelined embedded SRAM in the streaming processor of a CELL processor

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 48, Issue , 2005, Pages

  Dhong, Sang H ^a   Takahashi, Osamu ^a   White, Michael ^a   Asano, Toru ^b   Nakazato, Takaaki ^b   Silberman, Joel ^a   Kawasumi, Atsushi ^c   Yoshihara, Hiroshi ^d  

^a IBM   (United States)

^b IBM JAPAN LTD   (Japan)

^c TOSHIBA CORPORATION   (Japan)

^d SONY CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 28144451154     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. B. Flachs et al., "A Streaming Processor Unit for a CELL Processor," ISSCC Dig. Tech. Papers, Paper 7.4, pp. 134-135, Feb., 2005.
2. T. Kobayashi et al., "A Current-mode Latch Sense Amplifier and a Static Power Saving Input Buffer for Low-power Architecture," Symp. VLSI Circuits, pp. 28-29, 1992.