A 100dB SNR 2.5MS/s output data rate ΔΣ ADC

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 48, Issue , 2005, Pages

  Brewer, R ^a   Gorbold, J ^a   Hurrell, P ^a   Lyden, C ^b   Maurino, R ^a   Vickery, M ^a  

^a Analog Devices Inc UK   (United Kingdom)

^b ANALOG DEVICES   (Ireland)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 28144441372     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. G. Quilligan, C. Lyden and M. Cotter, "Broadband Delta-Sigma Architectures," Workshop on Embedded Data Converters, Stockholm, Sweden, Sept., 22, 2000. HTTP:www.imse.cnm.es/esdmsd/WORK-SHOPS/ESSCIRC2000_ED/ PRESENTATIONS/quilligan2.pdf
2. Y. Geerts, A. Marques and M. Steyaert, "A 3.3V, Delta-Sigma ADC with a Signal Bandwidth of 1.1MHz for ADSL Applications," IEEE J. Solid-State Circuits, vol. 34, pp. 927-936, July, 1999.
3. D. Ribner et al., "A Third-Order Multistage Delta-Sigma Modulator with Reduced Sensitivity to Nonidealities," IEEE J. Solid-State Circuits, vol. 26, pp. 1764-1774, Dec., 1991.