3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applications

IEEE Journal of Solid-State Circuits

Volumn 34, Issue 7, 1999, Pages 927-936

  Geerts, Yves ^a   Marques, Augusto Manuel ^a   Steyaert, Michel S J ^a   Sansen, Willy ^a,b,c  

^a UNIVERSITY OF LEUVEN   (Belgium)

^b STANFORD UNIVERSITY   (United States)

^c EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CAPACITORS; CMOS INTEGRATED CIRCUITS; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK TOPOLOGY; ELECTRIC POWER SUPPLIES TO APPARATUS; ELECTRIC RESISTANCE; SIGNAL FILTERING AND PREDICTION; SIGNAL TO NOISE RATIO; SWITCHING NETWORKS;

ANALOG INTEGRATED CIRCUITS; ASYMMETRICAL DIGITAL SUBSCRIBER LINE; CIRCUIT NONIDEALITIES; COMB FILTERING; SIGNAL SWING; SWITCH RESISTANCE; SWITCHED CAPACITOR CIRCUITS;

DELTA SIGMA MODULATION;

EID: 0033358697     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.772407     Document Type: Article

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