A low-jitter wideband multiphase PLL in 90nm SOI CMOS technology

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 48, Issue , 2005, Pages 414-415

  Kossel, Marcel ^a   Buchmann, Peter ^a   Menolfi, Christian ^a   Morf, Thomas ^a   Toifl, Thomas ^a   Schmatz, Martin ^a  

^a IBM   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 28144435039     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. J. Maneatis, "Low-Jitter and Process-Independent DLL and PLL Based on Self-Biased Techniques," ISSCC Dig. Tech. Papers, pp. 130-131, Feb., 1996.
2. Y. Eken, J. Uyemura, "A 5.9GHz Voltage-Controlled Ring Oscillator in 0.18μm CMOS," IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 230-233, Jan., 2004.
3. R. Tao, M. Berroth, "The Design of 5GHz Voltage Controlled Ring Oscillator Using Source Capacitively Coupled Current Amplifier," IEEE RFIC Symp., pp. 623-626, 2003.
4. I. Hwang, C. Kim, S. Kang, "A CMOS Self-Regulating VCO with Low Supply Sensitivity," IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 42-47, Jan., 2004.