Matlab as a development environment for FPGA design

Proceedings - Design Automation Conference

Volumn , Issue , 2005, Pages 607-610

  Bhatt, Tejas M ^a   McCain, Dennis ^a  

^a NOKIA RESEARCH CENTER   (United States)

Author keywords

Rapid Prototyping; System Design Flows

Indexed keywords

ALGORITHMS; INTERFACES (COMPUTER); OPTIMIZATION; SOFTWARE ENGINEERING;

HDL DESIGN TOOLS; SYSTEM DESIGN FLOWS; SYSTEM LEVEL LANGUAGE;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 27944447002     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/dac.2005.193882     Document Type: Conference Paper

References (6)

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2. http://www.catalyticinc.com/deltafic.html
3. Quo, Y., Xu, G., McCain, D and Cavallaro, J. R. Rapid Scheduling of Efficient FPGA Architectures for Next-Generation HSDPA Wireless System Using Precision C Synthesizer. IEEE International Workshop on Rapid Systems Prototyping, pp. 179-185, San Diego, CA, (June 2003).
4. 3GPP, Technical Specification, 25.211, v5.5.0, 2003-09.
5. th IEEE Asilomar Conference on Signals, Systems, and Computers, pp. 141-145, vol. 1, Monterey, CA, (Nov. 2003).
6. http://www.mathworks.com/products/modelsim/