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Volumn 31, Issue 10-12, 2005, Pages 960-983

A compiler for exploiting nested parallelism in OpenMP programs

Author keywords

Compiler parallelization; Hyper threading; Nested parallelism; OpenMP; Performance

Indexed keywords

MULTIMEDIA SYSTEMS; PARALLEL PROCESSING SYSTEMS; PERFORMANCE;

EID: 27844486561     PISSN: 01678191     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.parco.2005.03.007     Document Type: Article
Times cited : (17)

References (19)
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    • KTH Royal Institute of Technology Stockholm, Sweden
    • P.E. Hadjidoukas, and L. Amseled Portable support and exploitation of nested parallelism in OpenMP Proceedings of 6th European Workshop on OpenMP 18-22 October 2004 KTH Royal Institute of Technology Stockholm, Sweden 43 47
    • (2004) Proceedings of 6th European Workshop on OpenMP 18-22 October , pp. 43-47
    • Hadjidoukas, P.E.1    Amseled, L.2
  • 2
    • 24144449684 scopus 로고    scopus 로고
    • A portable and efficient thread library for OpenMP
    • KTH Royal Institute of Technology Stockholm, Sweden
    • S. Karlsson A portable and efficient thread library for OpenMP Proceedings of 6th European Workshop on OpenMP 18-22 October 2004 KTH Royal Institute of Technology Stockholm, Sweden 43 47
    • (2004) Proceedings of 6th European Workshop on OpenMP 18-22 October , pp. 43-47
    • Karlsson, S.1
  • 4
    • 24144496596 scopus 로고    scopus 로고
    • Compiler support and performance tuning of OpenMP programs on sun fire servers
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    • M. Lee, L. Meadows, D. Gove, D. Paulraj, S. Goil, B. Whitney, N. Copty, Y. Songl, Compiler support and performance tuning of OpenMP programs on sun fire servers, in: Proc. Fifth European on Workshop on OpenMP, 2003. Available from: 〈 http://www.rz.rwth-aachen.de/ewomp03/omptalks/Tuesday/Session6/t14p.pdf Aachen, Germany, 22-23 Sept〉
    • (2003) Proc. Fifth European on Workshop on OpenMP
    • Lee, M.1    Meadows, L.2    Gove, D.3    Paulraj, D.4    Goil, S.5    Whitney, B.6    Copty, N.7    Songl, Y.8
  • 5
    • 4644226743 scopus 로고    scopus 로고
    • Simultaneous Multithreading Implementation in POWER5-IBM's Next Generation POWER Microprocessor
    • IEEE computer Society
    • R. Kalla, B. Sinharoy, and J. Tendler Simultaneous Multithreading Implementation in POWER5-IBM's Next Generation POWER Microprocessor Proc. Hot Chips Conference 15, August 2003 IEEE computer Society Available from: 〈http://www.hotchips.org/archive/hc15/pdf/11.ibm.pdf〉
    • (2003) Proc. Hot Chips Conference 15, August
    • Kalla, R.1    Sinharoy, B.2    Tendler, J.3
  • 6
    • 35248821174 scopus 로고    scopus 로고
    • A practical OpenMP compiler for system on chips
    • Proc. of the International Workshop on OpenMP Applications and Tools (WOMPAT'03) Toronto, Canada, 26-27 June, Springer-Verlag Berlin
    • F. Liu, and V. Chaudhary A practical OpenMP compiler for system on chips Proc. of the International Workshop on OpenMP Applications and Tools (WOMPAT'03) Toronto, Canada, 26-27 June LNCS 2716 2003 Springer-Verlag Berlin 54 68
    • (2003) LNCS , vol.2716 , pp. 54-68
    • Liu, F.1    Chaudhary, V.2
  • 7
    • 35248836538 scopus 로고    scopus 로고
    • A C++ infrastructure for automatic introduction and translation of OpenMP directives
    • Proc. of the International Workshop on OpenMP Applications and Tools, (WOMPAT'03), Toronto, Canada, 26-27 June, Springer-Verlag Berlin
    • D. Quinlan, M. Schordan, Q. Yi, and B.R. de Supinski A C++ infrastructure for automatic introduction and translation of OpenMP directives Proc. of the International Workshop on OpenMP Applications and Tools, (WOMPAT'03), Toronto, Canada, 26-27 June LNCS 2716 2003 Springer-Verlag Berlin 13 25
    • (2003) LNCS , vol.2716 , pp. 13-25
    • Quinlan, D.1    Schordan, M.2    Yi, Q.3    De Supinski, B.R.4
  • 10
    • 1942448564 scopus 로고    scopus 로고
    • 1 (Other brands and names may be claimed as the property of others.) C++/Fortran Compiler for Hyper-Threading Technology: Implementation and Performance
    • 1 (Other brands and names may be claimed as the property of others.) C++/Fortran Compiler for Hyper-Threading Technology: implementation and Performance Intel Technol. J. 6 Q1 2002 Available from: 〈http://www.intel.com/technology/ itj〉
    • (2002) Intel Technol. J. , vol.6 , Issue.1
    • Tian, X.1    Bik, A.2    Girkar, M.3    Grey, P.4    Saito, H.5    Su, E.6
  • 14
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    • ITU-T Rec. (2002). H.264|ISO/IEC 14496-10 AVC, Document JVT-D157, 4th Meeting: Klagenfurt, Austria, July
    • ITU-T Rec. (2002). H.264|ISO/IEC 14496-10 AVC, Document JVT-D157, 4th Meeting: Klagenfurt, Austria, July.
  • 17
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    • Automatic parallelization for symmetric shared-memory multiprocessors
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    • J.H. Chow, L. Lyon, V. Sarkar, Automatic parallelization for symmetric shared-memory multiprocessors, in: Proc. CASCON'96. Toronto, ON, 12-14 November, pp.76-89, 1996.
    • (1996) Proc. CASCON'96 , pp. 76-89
    • Chow, J.H.1    Lyon, L.2    Sarkar, V.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.