A 64-way VLIW/SIMD FPGA architecture and design flow

11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004

Volumn , Issue , 2004, Pages 499-502

  Jones, Alex K ^a   Hoare, Raymond ^a   Kourtev, Ivan S ^a   Fazekas, Joshua ^a   Kusic, Dara ^a   Foster, John ^a   Boddie, Sedric ^a   Muaydh, Ahmed ^a  

^a University of Pittsburgh   (United States)

Author keywords

Compilers; ILP; Multimedia; Parallelism; SIMD; VLIW

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER ARCHITECTURE; COMPUTER SOFTWARE; FORMAL LOGIC; INTERFACES (COMPUTER); MULTIMEDIA SYSTEMS; BENCHMARKING; C (PROGRAMMING LANGUAGE); COMPUTER HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUIT DESIGN; SOFTWARE TESTING; VERY LONG INSTRUCTION WORD ARCHITECTURE;

COMPILERS; ILP; PARALLELISM; SIMD; VLIW;

FIELD PROGRAMMABLE GATE ARRAYS; PROGRAM COMPILERS;

FPGA ARCHITECTURES; FPGA DESIGN; ILP; MULTIMEDIUM; MULTIPLE DATA; PARALLELISM; PERFORMANCE; SINGLE INTERFACE MULTIPLE DATA; SINGLE-INTERFACE MULTIPLE; VERY LONG INSTRUCTION WORD;

EID: 27644489381     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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