A 64-way SIMD processing architecture on an FPGA

Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems

Volumn 15, Issue 1, 2003, Pages 345-350

  Hoare, Raymond ^a   Tung, Shenchih ^a   Werger, Katrina ^a  

^a University of Pittsburgh   (United States)

Author keywords

Architecture; FPGA; Parallelism; SIMD

Indexed keywords

COMPUTER ARCHITECTURE; FIELD PROGRAMMABLE GATE ARRAYS; FORMAL LOGIC; MICROPROCESSOR CHIPS; MULTIPLEXING; PRINTED CIRCUIT BOARDS; RANDOM ACCESS STORAGE; ROM; SHIFT REGISTERS; VERY LONG INSTRUCTION WORD ARCHITECTURE;

PARALLELISM; SIMD;

PARALLEL PROCESSING SYSTEMS;

EID: 1542748059     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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