Mismatch characterisation of chip interconnect resistance

IEEE International Conference on Microelectronic Test Structures

Volumn , Issue , 2005, Pages 183-186

  Deveugele, Jurgen ^a   Yao, Libin ^a   Steyaert, Michiel ^a   Sansen, Willy ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

MICROPROCESSOR CHIPS; OPTICAL INTERCONNECTS; PROBLEM SOLVING; RESISTORS;

ANALOG CIRCUITS; CHIP INTERCONNECTS; RESISTIVE ELEMENTS;

MICROWAVES;

EID: 27644451660     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

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2. G. A. M. van Der Plas, J. Vandenbussche, W. Sansen, M. S. J. Steyaert, and G. G. E. Gielen, "A 14-bit intrinsic accuracy Q2 random walk CMOS DAC," IEEE Journal of Solid-State Circuits, vol. 34, pp. 1708-1718, December 1999.
3. K. Uyttenhove and M. S. J. Steyaert, "A 1.8-V 6-bit 1.3-Ghz Flash ADC in 0.25-μm CMOS," IEEE Journal of Solid-State Circuits, vol. 38, pp. 1115-1122, July 2003.
4. N. Urbansky, M Harris, D. C. Butler, P. Rich, K. Buchanan and C. Goergens, "Advanced long throw PVD for contact to silicon and via applications," Microelctronic engineering, Elsvier Science B.V., Netherlands, March 2001.