Slicible rectangular graphs and their optimal floorplans

ACM Transactions on Design Automation of Electronic Systems

Volumn 6, Issue 4, 2001, Pages 447-470

  Dasgupta, Parthasarathi ^a,c   Sur Kolay, Susmita ^b  

^a Indian Institute of Management   (India)

^b INDIAN STATISTICAL INSTITUTE   (India)

^c INDIAN INSTITUTE OF MANAGEMENT CALCUTTA   (India)

Author keywords

Algorithms; Design; Floorplanning; Graph dualization; Heuristic search; Nonslicible floorplans; Planar graphs; Slicible floorplans; Theory

Indexed keywords

EID: 26844494025     PISSN: 10844309     EISSN: None     Source Type: Journal    
DOI: 10.1145/502175.502176     Document Type: Article

References (18)

1. BHASKER, J., AND SAHNI, S. 1986. A linear algorithm to find a rectangular dual of a planar trian-gulated graph. In Proceedings of the 23rd Annual ACM/IEEE Design Automation Conference (DAC) (June). ACM, New York, pp. 108-114.
2. CAI, Y., AND WONG, D. F. 1990. A channel/switchbox definition algorithm for building-block layout. In Proceedings of the 27th Annual ACM/IEEE Design Automation Conference (June). ACM, New York, pp. 638-641.
3. DASGUPTA, P. S., SUR-KOLAY, S., AND BHATTACHARYA, B. B. 1995a. VLSI Floorplan generation and area optimization using AND-OR graph search. In Proceedings of the 8th International Conference on. VLSI Design (Jan.). IEEE Computer Society Press, Los Alamitos, Calif., pp. 370-375.
4. DASGUPTA, P. S., SUR-KOLAY, S., AND BHATTACHARYA, B. B. 1995b. A unified approach to topology generation and area optimization of general floorplans. In Proceedings of the IEEE/ACM International Conference on Computer Aided Design (ICCAD). (San Jose, Calif, Nov. 5-9). ACM, New York, pp. 712-715.
5. DASGUPTA, P. S., SUR-KOLAY, S., AND BHATTACHARYA, B. B. 1998. A unified approach to topology generation and optimal sizing of floorplans. IEEE Trans. CAD 17, 2. (Feb.), 126-145.
6. KOZMINSKI, K., AND KINNEN, K. 1985. Rectangular dual of planar graphs. Networks 15, 2, 145-157.
7. LAI, Y. T., AND LEINWAND, S. M. 1988. Algorithms for floorplan design via rectangular dualization. IEEE Trans. CAD 7, 12 (Dec.), 1278-1289.
8. OTTEN, R. 1983. Efficient floorplan optimization. In Proceedings of the IEEE International Conference on Computer Design (ICCD). IEEE Computer Society Press, Los Alamitos, Calif, pp. 499-502.
9. PAN, P., SHI, W., AND LIU, C. L. 1996. Area minimization for hierarchical Floorplans. Algorithmica 15, 6.
10. REBAUDENGO, M., AND REORDA, M. S. 1996. GALLO: A genetic algorithm for floorplan area optimization. IEEE Trans. CAD 15, 8, (Aug.), 943-951.
11. SUR-KOLAY, S., AND BHATTACHARYA, B. B. 1988. Inherent nonslicibility of rectangular duals in VLSI floorplanning. In Proceedings of the 8th Conference on Foundations of Software Technology and Theoretical Computer Science (Pune, India, Dec. 21-23). Lecture Notes in Computer Science, vol. 338. Springer-Verlag, Berlin, Germany, pp. 88-107.
12. SUR-KOLAY, S., AND BHATTACHARYA, B. B. 1991. On the family of inherently nonslicible floorplans in VLSI layout design. In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS) (Singapore, Jun.). IEEE Computer Society Press, Los Alamitos, Calif, pp. 2850-2853.
13. SHERWANI, N. 1993. Algorithms for VLSI physical design automation. Kluwer Academic Publishers.
14. STOCKMEYER, L. 1983. Optimal orientation of cells in slicing floorplan designs. Inf. Control 57, 91-101.
15. WIMER, S., KOREN, I., AND CEDERBAUM, I. 1989. Optimal aspect ratios of building blocks in VLSI. IEEE Trans. CAD 8, 2 (Feb.), 139-145.
16. WANG, T. C., AND WONG, D. F. 1992. Optimal floorplan area optimization. IEEE Trans. CAD 11, 8, 992-1002.
17. YEAP, K. H., AND SARRAFZADEH, M. 1993. A unified approach to floorplan sizing and enumeration. IEEE Trans. CAD 12, 12, 1858-1867.
18. YEAP, K. H., AND SARRAFZADEH, M. 1995. Sliceable floorplanning by graph dualization. SIAM J. Disc. Math. 8, 2 (May), 258-280.