A spread spectrum clock generator using digital tracking scheme

IEICE Transactions on Electronics

Volumn E88-C, Issue 6, 2005, Pages 1288-1289

  Yoshikawa, Takefumi ^a   Ebuchi, Tsuyoshi ^a   Arima, Yukio ^a   Iwata, Toru ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

EMI; Phase interpolator; PLL; Spread spectrum clocking

Indexed keywords

DIGITAL CONTROL SYSTEMS; PHASE LOCKED LOOPS; PHASE MODULATION;

EMI; PHASE INTERPOLATOR; SPREAD SPECTRUM CLOCKING;

ELECTRIC GENERATORS;

EID: 25844439380     PISSN: 09168524     EISSN: 17451353     Source Type: Journal    
DOI: 10.1093/ietele/e88-c.6.1288     Document Type: Article

References (3)

1. Hu.S. Li, et al., "Dual loop spread spectrum clock generator," Digest of IEEE International Solid-State Circuit Conference, pp.186-187, Feb. 1999.
2. M. Sugawara, et al., "1.5 Gbps 5150 ppmt spread spectrum SerDes PHY with a 0.3 mW, 1.5 Gbps level detector for serial ATA," Digest of Symposium on VLSI Circuits, pp. 122-123, June 2002.
3. M. Aoyama, et al., "3 Gbps 5000 ppm spread spectrum SerDes PHY with frequency tracking phase interpolator for serial ATA," Digest of Symposium on VLSI Circuits, pp. 107-110, June 2003.