3Gbps, 5000ppm Spread Spectrum SerDes PHY with frequency tracking Phase Interpolator for Serial ATA

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2003, Pages 107-110

  Aoyama, Morishige ^a   Ogasawara, Kazuo ^a   Sugawara, Mitsutoshi ^b   Ishibashi, Terukazu ^d   Ishibashi, Takashi ^b   Shimoyama, Shinichi ^b   Yamaguchi, Kouichi ^c   Yanagita, Tomonori ^d   Noma, Toshihiro ^a  

^a RENESAS TECHNOLOGY CORP   (Japan)

^b NEC Corporation of America   (United States)

^c NEC CORPORATION   (Japan)

^d NEC IC Microcomputer Systems Ltd   (Japan)

Author keywords

CMOS; Phase interpolator; PLL; SerDes; Serial ATA; Spread spectrum

Indexed keywords

CLOCKS; CMOS INTEGRATED CIRCUITS; COMMUNICATION CHANNELS (INFORMATION THEORY); DATA ACQUISITION; FREQUENCY MODULATION;

PHASE INTERPOLATOR;

SPREAD SPECTRUM COMMUNICATION;

EID: 0141649480     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. Serial ATA Workgroup "SATA: High Speed Serialized AT Attachment", Revision 1.0, 29-August-2001,
2. M. Sugawara, et al., "1.5Gbps, 5150 ppm Spread Spectrum SerDes PHY with a 0.3mW, 1.5Gbps Level Detector for Serial ATA", 2002 Symposium on VLSI Circuits Digest of Technical Papers 5-3, June/2002,