Recursive filtering on a vector DSP with linear speedup

Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors

Volumn , Issue , 2005, Pages 379-386

  Van Der Horst, M ^a   Van Berkel, K ^a,b   Lukkien, J ^a   Mak, R ^a  

^a EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

RECURSIVE FILTERING; SIMD DSPS; VECTOR DSP; WIRELESS COMMUNICATION;

COMPUTER HARDWARE; IIR FILTERS; MULTIMEDIA SYSTEMS; SIGNAL FILTERING AND PREDICTION; TELECOMMUNICATION SYSTEMS; THROUGHPUT;

SIGNAL PROCESSING;

EID: 24944583324     PISSN: 10636862     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASAP.2005.55     Document Type: Conference Paper

References (11)

1. C. Berkel, F. Heinle, P. Meuwissen, K. Moerman, and M. Weiss. Vector Processing as an Enabler for Software-Defined Radio in Handsets from 3G+WLAN Onwards. In Proc. Software Defined Radio Technical Conference, volume B, pages 125-130, Nov. 2004.
2. J. Fridman and Z. Greenfield. The TigerSHARC DSP architecture. IEEE Micro, 20(1):66-76, 2000.
3. A. Krukowski, I. Kale, and G. Cain. Decomposition Of IIR transfer Functions Into Parallel Arbitrary-Order IIR Subfilters. In Proc. IEEE Nordic Signal Processing Symposium (NORSIG '96), pages 175-178, Sept. 1996.
4. C. Leiserson and J. Saxe. Optimizing synchronous systems. Journal of VLSI and Computer Systems, 1(1):41-67, 1983.
5. Y. Lim and B. Liu. Pipelined Recursive Filter with Minimum Order Augmentation. IEEE Trans. Signal Processing, 40(7), July 1992.
6. H.-D. Lin and D. Messerschmitt. Finite state machine has unlimited concurrency. IEEE Trans. Circuits and Systems, 38(5), May 1991.
7. H.-H. Lu, E. Lee, and D. Messerschmitt. Fast Recursive Filtering with Multiple Slow Processing Elements. IEEE Trans. Circuits and Systems, CAS-32(11), Nov. 1985.
8. K. Parhi. High-Speed VLSI Architectures for Huffman and Viterbi Decoders. IEEE Trans. Circuits and Systems II, 39(6):385-391, June 1992.
9. K. Parhi and D. Messerschmitt. Pipeline Interleaving and Parallelism in Recursive Digital Filters. Part II: Pipelined Incremental Block Filtering. IEEE Trans. on Acoustics, Speech, and Signal Processing, 37(7), July 1989.
10. J. Robelly, G. Cichon, H. Seidel, and G. Fettweis. Implementation of Recursive Digital Filters into Vector SIMD DSP Architectures. In Proc. Int. Conf. Acoustics, Speech and Signal Processing, May 2004.
11. R. Schaffer, M. Hosemann, R. Merker, and G. Fettweis. Recursive Filtering on SIMD Architectures. In IEEE Workshop on Signal Processing Systems, Aug. 2003.