Novel hermetic wafer-level-packaging technology using low-temperature passivation

Proceedings - Electronic Components and Technology Conference

Volumn 1, Issue , 2005, Pages 562-565

  Leib, Jürgen ^a   Mund, Dietrich ^a   Töpper, Michael ^b  

^a SCHOTT Electronic Packaging GmbH   (Germany)

^b FRAUNHOFER IZM   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

GLASS; HERMETIC DEVICES; MICROELECTRONICS; PASSIVATION; SILICON; SILICON WAFERS;

HERMETICALLY SEALED GLASS; MICROELECTRONIC DEVICES; MINIATURIZATION; WAFER-LEVEL-PACKAGING;

ELECTRONICS PACKAGING;

EID: 24644504883     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ectc.2005.1441323     Document Type: Conference Paper

References (5)

1. th Electronic Components and Technology Conf, Las Vegas, June 2004
2. th Electronic Components and Technology Conf, Las Vegas, June 2004
3. Lau, J. H., Ricky Lee, S. W., "Chip Scale Package: Design, Materials, Process, Reliability, and Applications", McGraw-Hill, Februar 1999
4. M. Topper, J. Auersperg, V. Glaw, K. Kaskoun, E. Prack, B. Keser, P. Coskina, D. Jäger, D. Petter, O. Ehrmann K. Samulewicz, C. Meinherz, C. Karduck, S. Fehlberg, H. Reichl "Fab Integrated Packaging (FIP) A New Concept for High Reliable Wafer-Level Chip Size Packaging"Proceedings IEEE, ECTC, May 2000
5. www.schott.com/epackaging/english/products/special_glasses/