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Volumn 28, Issue 3, 2005, Pages 445-448

Design and validation of a power supply noise reduction technique

Author keywords

Capacitors; Decoupling of systems; Noise; Noise measurement

Indexed keywords

CAPACITANCE; CAPACITORS; COMPUTER SIMULATION; ELECTRONICS PACKAGING; SPURIOUS SIGNAL NOISE;

EID: 24644487388     PISSN: 15213323     EISSN: None     Source Type: Journal    
DOI: 10.1109/TADVP.2005.847802     Document Type: Article
Times cited : (17)

References (4)
  • 1
    • 0035704356 scopus 로고    scopus 로고
    • "Design and performance evaluation of Pentium III microprocessor packaging"
    • A. Sarangi et al., "Design and performance evaluation of Pentium III microprocessor packaging," Electrical Performance Electron. Packag., pp. 291-294, 2001.
    • (2001) Electrical Performance Electron. Packag. , pp. 291-294
    • Sarangi, A.1
  • 3
    • 24644509798 scopus 로고    scopus 로고
    • "Packaging challenges for advanced microprocessor technology"
    • Sienna, Italy, Keynote paper
    • T. Arabi, G. Taylor, C. Webb, and P. Green, "Packaging challenges for advanced microprocessor technology," in Signal Propagation on Interconnects, Sienna, Italy, 2003. Keynote paper.
    • (2003) Signal Propagation on Interconnects
    • Arabi, T.1    Taylor, G.2    Webb, C.3    Green, P.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.