A 0.6V 205MHz 19.5ns tRC 16Mb embedded DRAM

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Hardee, K ^a   Jones, F ^a   Butler, D ^a   Parris, M ^a   Mound, M ^a   Calendar, H ^a   Jones, G ^a   Aldrich, L ^c   Gruenschlaeger, C ^a   Miyabayashi, M ^b   Taniguchi, K ^b   Arakawa, T ^b  

^a United Memories   (United States)

^b SONY CORPORATION   (Japan)

^c NONE

Author keywords

[No Author keywords available]

Indexed keywords

DRAIN VOLTAGE; LOW VOLTAGE OPERATIONS; MEMORY CELLS; SWITCHING SPEED;

ELECTRIC CURRENTS; ELECTRIC POTENTIAL; EMBEDDED SYSTEMS; GATES (TRANSISTOR); HIGH TEMPERATURE APPLICATIONS; LOGIC CIRCUITS;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 2442700133     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. S. Tomiehima et al., ISSCC Dig. Tech. Papers, pp. 384-385, Feb. 2001.
2. J. Barth et al., ISSCC Dig. Tech. Papers, pp. 156-157, Feb. 2002.
3. J. Sim et al., ISSCC Dig. Tech. Papers, pp. 310-311, Feb. 2003.
4. M. Miyazaki et al., IEEE J. Solid-State Circuits, vol. 37, pp. 210-217, Feb. 2002.
5. J. Tschanz et al., IEEE J. Solid-State Circuits, vol. 36, pp. 1396-1402, Nov. 2002.
6. K. Min et al., ISSCC Dig. Tech. Papers, pp. 400-401, Feb. 2003.