A 25MS/s 14b 200mW ΣΔ modulator in 0.18μm CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Balmelli, Pio ^a   Huang, Qiuting ^a  

^a ETH ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL SUBSCRIBER LINES (DSL); INTEGRATORS; RECOVERABILITY;

ANALOG TO DIGITAL CONVERSION; BANDWIDTH; CALIBRATION; CAPACITORS; CMOS INTEGRATED CIRCUITS; RESONATORS; SIGNAL INTERFERENCE; SIGNAL TO NOISE RATIO; TRANSFER FUNCTIONS;

MODEMS;

EID: 2442655141     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. E. Reutemann, P. Balmelli, Q. Huang, "A33mW 14b 2.5MSample/s ΣΔ A/D Converter in 0.25μm Digital CMOS," ISSCC Dig. Tech. Papers, pp. 316-317, Feb. 2002.
2. K. Vleugels et al, "A 2.5V Broadband Multi-Bit ΣΔ Modulator with 95dB Dynamic Range," ISSCC Dig. Tech. Papers, pp. 50-61, Feb. 2001.
3. W. De Wilde et al, "Analog Front End for DMT-Based VDSL," ISSCC Dig. Tech. Papers, pp. 328-329, Feb. 2002.
4. D. Kelly et al, "A 3V 340mW 14b 75MSPS CMOS ADC with 85dB SFDR at Nyquist," ISSCC Dig. Tech. Papers, pp. 134-135, Feb. 2001.
5. M. Moyal et al, "A 700/900mW/Channel CMOS Dual Analog Front-End IC for VDSL with Integrated 11.5/14.5dBm Line Drivers," ISSCC Dig. Tech. Papers, pp. 416-417, Feb. 2003.