An HMAC processor with integrated SHA-1 and MD5 algorithms

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2004, Pages 456-458

  Wang, Mao Yin ^a   Su, Chih Pin ^a   Huang, Chih Tsun ^a   Wu, Cheng Wen ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; DIGITAL COMMUNICATION SYSTEMS; FUNCTIONS; INTEGRATED CIRCUITS; INTERNET; MICROPROCESSOR CHIPS; MULTIPLEXING; SECURITY SYSTEMS;

CRYPTOGRAPHIC ALGORITHMS; HARDWARE SHARING; MD5 ALGORITHMS;

CRYPTOGRAPHY;

EID: 2442611804     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)

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