C-based behavioral synthesis and verification analysis on industrial design examples

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2004, Pages 344-348

  Wakabayashi, Kazutoshi ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BEHAVIOR SYNTHESIS; CODE EFFICIENCY; DEBUGGERS; DESIGN FLOW;

BUSES; COMMUNICATION SYSTEMS; COMPUTER PROGRAMMING LANGUAGES; COMPUTER SIMULATION; DIGITAL LIBRARIES; EMBEDDED SYSTEMS; INTERFACES (COMPUTER); MICROPROCESSOR CHIPS; NETWORK PROTOCOLS;

DIGITAL SIGNAL PROCESSING;

EID: 2442588793     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. K.Wakabayashi and T.Okamoto, "C-based SoC Design Flow and EDA Tools: An ASIC and System Vendor Perspective," IEEE Trans, on Computer-Aided Design of Integrated Circuits and Systems, Vol. 19, No. 12, pp. 1507-1522, Dec. 2000
2. H.Kurokawa, et al., "Study and Analysis of System LSI Design Methodologies Using C-Based Behavioral Synthesis", IEICE Trans. On Fundamentals, Vol.E85-A., Jan. 2002
3. S.Takahashi, H.Kurokawa and M.Otsubo, "behavior synthesis of processor for STB streami data", A-3-16, No.7476, Proc. of IEICE annual meeting. March,2002
4. H.Nakajima,"Semi-custom processor design experiences using C-based behavioral synthesis", A-3-15, No.7475, Proc. of IEICE annual meeting. March, 2002
5. http://www.tensilica.com
6. http://www.mepcore.com/english/