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Volumn 45, Issue 9-11, 2005, Pages 1544-1549
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Electrical performance evaluation of FIB edited circuits through chip backside exposing shallow trench isolations
a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER AIDED DESIGN;
MICROPROCESSOR CHIPS;
POLYSILICON;
CIRCUIT EDIT;
ELECTRICAL PERFORMANCE EVALUATION;
METAL LEVELS;
STI STRUCTURES;
INTEGRATED CIRCUITS;
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EID: 24144491329
PISSN: 00262714
EISSN: None
Source Type: Journal
DOI: 10.1016/j.microrel.2005.07.033 Document Type: Conference Paper |
Times cited : (14)
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References (6)
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