Parallel iterative solvers for sparse linear systems in circuit simulation

Future Generation Computer Systems

Volumn 21, Issue 8, 2005, Pages 1275-1284

  Basermann, A ^a   Jaekel, U ^a   Nordhausen, M ^a   Hachiya, K ^b  

^a NEC LABORATORIES EUROPE   (Germany)

^b RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

Circuit simulation; Parallel iterative solver; Partitioning; Preconditioning; Reordering; System reduction

Indexed keywords

COMPUTER SIMULATION; ITERATIVE METHODS; LINEAR SYSTEMS; MATRIX ALGEBRA; NETWORKS (CIRCUITS); PARALLEL PROCESSING SYSTEMS; PERSONAL COMPUTERS;

CIRCUIT SIMULATION; EQUATION SYSTEM; FACTORIZATION; SPARSE LINEAR SYSTEM;

PROBLEM SOLVING;

EID: 24044444557     PISSN: 0167739X     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.future.2004.09.007     Document Type: Conference Paper

References (12)

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