Direct connect device core: Design and applications

Integration, the VLSI Journal

Volumn 37, Issue 2, 2004, Pages 83-102

  Elkeelany, Omar ^a   Chaudhry, Ghulam ^a  

^a UNIVERSITY OF MISSOURI KANSAS CITY   (United States)

Author keywords

Ethernet performance; Low power design; Operating system off loading; Verilog HDL

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER OPERATING SYSTEMS; COSTS; ELECTRIC POWER UTILIZATION; FIELD PROGRAMMABLE GATE ARRAYS; INTEGRATED CIRCUIT LAYOUT; LOCAL AREA NETWORKS; NETWORK PROTOCOLS; PERSONAL COMPUTERS; PROBLEM SOLVING; ROM;

DIRECT CONNECT DEVICE CORE (DCD-CORE); ETHERNET PERFORMANCE; LOW POWER DESIGN; OPERATING SYSTEM OFF-LOADING; VERILOG HARDWARE DESCRIPTION LANGUAGES (HDL);

VLSI CIRCUITS;

EID: 2342530457     PISSN: 01679260     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.vlsi.2003.11.002     Document Type: Article

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