Task-parallel programming of reconfigurable systems

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2147, Issue , 2001, Pages 172-181

  Weinhardt, Markus ^a   Luk, Wayne ^b  

^a KreCo GmbH   (Germany)

^b IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; COMPUTER CIRCUITS; DATA TRANSFER; PARALLEL PROGRAMMING; STRUCTURAL DESIGN;

APPLICATION DEVELOPMENT; EFFICIENT INTERACTION; HARDWARE AND SOFTWARE; HARDWARE AND SOFTWARE COMPONENTS; HARDWARE SYNTHESIS; LANGUAGE EXTENSIONS; RECONFIGURABLE SYSTEMS; SOFTWARE GENERATION;

COMPUTER SYSTEMS PROGRAMMING;

EID: 23044529491     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44687-7_18     Document Type: Conference Paper

References (14)

1. [1] M. B. Gokhale and J.M. Stone. NAPA C: compiling for a hybrid RISC/FPGA architecture. In Proc. FPGAs for Custom Computing Machines. IEEE Computer Society Press, 1998.
2. [2] M. Weinhardt and W. Luk. Pipeline vectorization. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, February 2001.
3. [3] D. A. Buell, J.M. Arnold, and W. J. Kleinfelder. Splash 2 - FPGAs in a Custom Computing Machine. IEEE Computer Society Press, 1996.
4. Celoxica Limited. Homepage http://www.celoxica.com.
5. [5] P.M. Athanas and H. F. Silverman. Processor reconfiguration through instruction-set metamorphosis. IEEE Computer, 26, March 1993.
6. [6] J. R. Hauser and J. Wawrzynek. Garp: A MIPS processor with a reconfigurable coprocessor. In Proc. FPGAs for Custom Computing Machines. IEEE Computer Society Press, 1997.
7. [7] C. R. Rupp, M. Landguth, T. Garverick, E. Gomersall and H. Holt. The NAPA adaptive processing architecture. In Proc. FPGAs for Custom Computing Machines. IEEE Computer Society Press, 1998.
8. [8] C. A. R. Hoare. Communicating Sequential Processes. Prentice-Hall International, 1985.
9. [9] C. A. R. Hoare and I. Page. Hardware and software: The closing gap. Transputer Communications, 2(2), June 1994.
10. [10] E. Barros and A. Sampaio. Towards provably correct hardware/software partitioning using occam. In Proc. Int. Workshop on Hardware/Software Codesign. IEEE Computer Society Press, 1994.
11. [11] I. Page andW. Luk. Compiling Occam into FPGAs. In FPGAs. Abingdon EE&CS Books, 1991.
12. [12] H. R. Myler and A. R. Weeks. Computer Imaging Recipes in C. Prentice Hall, 1993.
13. [13] M. Weinhardt and W. Luk. Memory access optimization and RAM inference for pipeline vectorization. In Field Programmable Logic and Applications, LNCS 1673. Springer, 1999.
14. The Stanford SUIF Compiler Group. Homepage http:// suif.stanford.edu.