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Volumn 3, Issue 4, 1998, Pages 563-580

Specification and verification of pipelining in the ARM2 RISC microprocessor

Author keywords

Abstract state machines; ARM processor; Design verification; Formal verification; Pipelined processors; Pipelining

Indexed keywords


EID: 22644448323     PISSN: 10844309     EISSN: None     Source Type: Journal    
DOI: 10.1145/296333.296345     Document Type: Article
Times cited : (27)

References (19)
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    • Specification and verification of pipelining in the ARM2 RISC microprocessor
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.