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Volumn 40, Issue 7, 2005, Pages 1491-1498

A 0.22-mm2 7.25-mW per-channel audio stereo-DAC with 97-dB DR and 39-dB SNRout

Author keywords

Digital to analog converters; Low power; Sigma delta modulation; Switched capacitor filters

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CAPACITORS; CMOS INTEGRATED CIRCUITS; CROSSTALK; DIGITAL FILTERS; ELECTRIC POTENTIAL; ELECTRIC POWER UTILIZATION; POWER CONVERTERS;

EID: 22544440632     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2005.847486     Document Type: Conference Paper
Times cited : (25)

References (11)
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    • Amsterdam, The Netherlands, May, Preprint 4963
    • R. Adams, K. Nguyen, and K. Sweetland, "A 116-dB SNR multibit noise-shaping DAC with 192-kHz sample rate," presented at the 106th AES Conv., Amsterdam, The Netherlands, May 1999, Preprint 4963.
    • (1999) 106th AES Conv.
    • Adams, R.1    Nguyen, K.2    Sweetland, K.3
  • 4
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    • Dec.
    • I. Fujimori and T. Sugimoto, "A 1.5-V 4.1-mW dual-channel audio delta-sigma D/A converter," IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 1879-1886, Dec. 1998.
    • (1998) IEEE J. Solid-state Circuits , vol.33 , Issue.12 , pp. 1879-1886
    • Fujimori, I.1    Sugimoto, T.2
  • 5
    • 0032308948 scopus 로고    scopus 로고
    • A 113-dB SNR oversampling. DAC with segmented noise-shaped scrambling
    • Dec.
    • R. Adams, K. Nguyen, and K. Sweetland, "A 113-dB SNR oversampling. DAC with segmented noise-shaped scrambling," IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 1871-1878, Dec. 1998.
    • (1998) IEEE J. Solid-state Circuits , vol.33 , Issue.12 , pp. 1871-1878
    • Adams, R.1    Nguyen, K.2    Sweetland, K.3
  • 6
    • 0036640965 scopus 로고    scopus 로고
    • A low-power 98 dB multibit audio DAC in a standard 3.3 v 0.35 μm CMOS technology
    • Jul.
    • M. Annovazzi, V. Colonna, G. Gandolfi, F. Stefani, and A. Baschirotto, "A low-power 98 dB multibit audio DAC in a standard 3.3 V 0.35 μm CMOS technology," IEEE J. Solid-State Circuits, vol. 37, no. 7, pp. 825-834, Jul. 2002.
    • (2002) IEEE J. Solid-state Circuits , vol.37 , Issue.7 , pp. 825-834
    • Annovazzi, M.1    Colonna, V.2    Gandolfi, G.3    Stefani, F.4    Baschirotto, A.5
  • 7
    • 0029532111 scopus 로고
    • Linearity enhancement of multibit delta-sigma A/D and D/A converters using data weighted averaging
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    • R. Baird and T. Fiez, "Linearity enhancement of multibit delta-sigma A/D and D/A converters using data weighted averaging," IEEE Trans. Circuits Syst. II: Analog Digit. Signal Process., vol. 42, no. 12, pp. 753-762, Dec. 1995.
    • (1995) IEEE Trans. Circuits Syst. II: Analog Digit. Signal Process. , vol.42 , Issue.12 , pp. 753-762
    • Baird, R.1    Fiez, T.2
  • 8
    • 0000076149 scopus 로고
    • A switching scheme for switch capacitor filters which reduces the effect of parasitic capacitances associated with switch control terminals
    • May
    • D. Haigh and B. Singh, "A switching scheme for switch capacitor filters which reduces the effect of parasitic capacitances associated with switch control terminals," in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), May 1983, pp. 586-589.
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    • D. Monticelli, "A quad CMOS single-supply op amp with rail-to-rail output swing," IEEE J. Solid-State Circuits, vol. SC-21, no. 6, pp. 1026-1034, Dec. 1986.
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    • Monticelli, D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.