Process optimization of gold stud bump manufacturing using artificial neural networks

Expert Systems with Applications

Volumn 29, Issue 2, 2005, Pages 264-271

  Liau, Leo Chau Kuang ^a   Chen, Burce Shin Ching ^a  

^a YUAN ZE UNIVERSITY   (Taiwan)

Author keywords

Artificial neural networks; Design of experiment; Gold stud bump; Process optimization; Shear stress

Indexed keywords

FLIP CHIP DEVICES; INTEGRATED CIRCUITS; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS; MICROELECTRONICS; MICROPROCESSOR CHIPS; NEURAL NETWORKS; OPTIMIZATION; PACKAGING; RELIABILITY; SHEAR STRESS; STUD WELDING;

DESIGN OF EXPERIMENTS; ELECTRONIC FLAME OFF (EFO); GOLD STUD BUMPS; PROCESS OPTIMIZATION;

GOLD METALLOGRAPHY;

EID: 22144496126     PISSN: 09574174     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.eswa.2005.04.023     Document Type: Article

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