Flexible cryo-packages for Josephson devices

IEEE Transactions on Applied Superconductivity

Volumn 15, Issue 2 PART I, 2005, Pages 465-468

  Burroughs, Charles J ^a   Benz, Samuel P ^a   Dresselhaus, Paul D ^a   Chong, Yonuk ^a   Yamamori, Hirotake ^b  

^a NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

^b NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

Author keywords

Chip bonding; Cryo packaging; Josephson arrays; Josephson voltage standard

Indexed keywords

DEGRADATION; ELECTRIC POTENTIAL; INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; MICROWAVES; PACKAGING; SUPERCONDUCTING DEVICES; THERMAL CYCLING;

CHIP BONDING; CRYO-PACKAGING; JOSEPHSON ARRAYS; JOSEPHSON VOLTAGE STANDARD;

JOSEPHSON JUNCTION DEVICES;

EID: 22044452817     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2005.849876     Document Type: Conference Paper

References (8)

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