Dynamic reconfiguration of streaming graphs on a heterogeneous multiprocessor architecture

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5683, Issue , 2005, Pages 53-63

  Rutten, Martijn ^a   Pol, Evert Jan ^a   Van Eijndhoven, Jos ^b   Walters, Karel ^b   Essink, Gerben ^b  

^a NXP SEMICONDUCTORS   (Netherlands)

^b PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

Media processing; MPEG 2; Multiprocessor architecture; SoC subsystem; Streaming graph reconfiguration

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; CONSUMER ELECTRONICS; DATA REDUCTION; GRAPH THEORY; MOTION PICTURES; REAL TIME SYSTEMS;

MEDIA PROCESSING; MPEG-2; MULTIPROCESSOR ARCHITECTURE; SOC SUBSYSTEM; STREAMING GRAPH RECONFIGURATION;

MULTIPROCESSING SYSTEMS;

EID: 21844444581     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.586112     Document Type: Conference Paper

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