Multi-bit MONOS nonvolatile memory based on double-gate technology

International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT

Volumn 1, Issue , 2004, Pages 691-694

  Chun, Alain ^a   Chan, Keung ^a   Yuen, Kam Hung ^a   Man, Tsz Yin ^a   Chan, Mansun ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING; COMPUTER SIMULATION; ELECTRIC POTENTIAL; ELECTRON TUNNELING; GATES (TRANSISTOR); MOSFET DEVICES; POLYSILICON;

CHANNEL HOT ELECTRON (CHE) INJECTION; MEMORY CELLS; NONVOLATILE MEMORY (NVM); NUMERICAL DEVICE SIMULATION;

DATA STORAGE EQUIPMENT;

EID: 21644479333     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. Marvin H. White, et al, "On the Go with SONOS", IEEE and Devices Magazine, Volume: 16 Issue: 4, pp 22-31, Jul 2000.
2. Eli Lusjy, et al, "Characterization of Channel Hot Electron Injection by the Subthreshold Slope of NROM™ Device", IEEE EDL, volume 22, no.11, pp.536-558, 2001.
3. Boaz Eitan, et al, "NROM: A Novel Localized Trapping, 2-bits Nonvolatile Memory Cell", IEEE EDL, volume 21, no. 11.