A fast VLSI architecture for two-dimensional discrete wavelet transform based on lifting scheme

International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT

Volumn 3, Issue , 2004, Pages 1661-1664

  Xiong, Chengyi ^a,b   Tian, Jinwen ^a   Liu, Jian ^a  

^a HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (China)

^b SOUTH CENTRAL UNIVERSITY FOR NATIONALITIES   (China)

Author keywords

Embedded decimation; Lifting wavelet transform; Parallel; Power efficient

Indexed keywords

ALGORITHMS; APPROXIMATION THEORY; DATA STORAGE EQUIPMENT; EMBEDDED SYSTEMS; NATURAL FREQUENCIES; SIGNAL PROCESSING; WAVELET TRANSFORMS;

EMBEDDED DECIMATION; LIFTING WAVELET TRANSFORM; PARALLEL; POWER EFFICIENT;

VLSI CIRCUITS;

EID: 21644450891     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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